U.S. federal trademark · Serial No. 87505646 · Reg. No. 5694379
Reduced instruction set computing (RISC) based instruction set architectures, namely, software instructions for use with advanced single instruction, multiple data (SIMD) parallel computer engines designed to accelerate multimedia applications in particular microprocessors; downloadable electronic publications, namely, instruction manuals, user manuals, technical manuals, development manuals, datasheets, brochures, articles, newsletters, books, magazines, journals, research papers and white papers in the field of semiconductors, microprocessors and reduced instruction set computing (RISC) based instruction set architectures; downloadable electronic publications, namely, instruction manuals, user manuals, technical manuals, development manuals, datasheets, brochures, articles, newsletters, books, magazines, journals, research papers and white papers in the field of semiconductors, microprocessors, data processing equipment and reduced instruction set computing (RISC) based instruction set architectures
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