Trademark Search  /  VERIPOWER

VERIPOWER

○ Dead · Abandoned

U.S. federal trademark · Serial No. 75353451

Mark
VERIPOWER
Status
Abandoned
Serial Number
75353451
Filing Date
September 8, 1997
Class(es)
Class 009

Owner

Robert Schopmeyer
03 · Palo Alto, CA, US

Goods & Services

VeriPower is a PLI based power calculation tool for Verilog designers, targeted at users who want a fast but very accurate look at the power consumed by their design while running a Verilog simulation; this tool includes - total power and node power, power calculation interval, and power_tool output data (provides the Verilog designer with the capability to calculate the power consumed by their design as it is running vectors during Verilog simulation

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Source: USPTO federal trademark records. Informational only, not legal advice. Status and details may lag the live USPTO database.